SDET · Computer Science MSc Student

Engineering confidence.Measuring performance.

I build automated verification systems for embedded radar software using Robot Framework, Python, and C++ simulators. Alongside my professional work, I research LLM inference performance on CPU architectures with High-Bandwidth Memory.

About this engineering path

T01-TC01 Verify SUT Responds Before Coffee Timeout

embedded-test-demo — Visual Test Workbench

Read-only Robot and Python source files

test.robot

                  *** Settings ***Documentation     Public Robot Framework BDD demonstration.Library           keywords.EmbeddedSystemKeywordsTest Teardown     Close Test Session *** Variables ***${TEST_ID}               T01-TC01${EXPECTED_STATUS}       READY *** Test Cases ***T01-TC01 Verify SUT Responds Before Coffee Timeout    [Documentation]    Public demo using fictional values only.    Given Simulator Connection Is Open    And Test Session Is Started    ${TEST_ID}    When System Health Is Requested    Then SUT Response Status Should Be    ${EXPECTED_STATUS}    And Test Note Is Logged    The SUT is awake. Engineering may proceed.
                

keywords.py

                  from client import SimulatorClient # Display code only; no module is imported or executed. class EmbeddedSystemKeywords:    ROBOT_LIBRARY_SCOPE = "SUITE"     def __init__(self) -> None:        self.client: SimulatorClient | None = None        self.response_status: str | None = None     def simulator_connection_is_open(self) -> None:        self.client = SimulatorClient(host="simulator", port=9001)        self.client.connect()     def test_session_is_started(self, test_id: str) -> None:        self._require_client().send("START_TEST", {"test_id": test_id})     def system_health_is_requested(self) -> None:        client = self._require_client()        client.send("READ_HEALTH_STATUS", {})        self.response_status = client.receive()["status"]     def sut_response_status_should_be(self, expected_status: str) -> None:        assert self.response_status == expected_status     def test_note_is_logged(self, note: str) -> None:        print(note)     def close_test_session(self) -> None:        if self.client is not None:            self.client.close()     def _require_client(self) -> SimulatorClient:        if self.client is None:            raise RuntimeError("Simulator client is not connected")        return self.client
                
ProblemsOutputDebug Console

Terminal

$ robot -t "T01-TC01" test.robot
main*IDLERobot → PythonUTF-8Spaces: 4
This editor example demonstrates a Robot Framework BDD test calling a Python keyword library. The Python client coordinates a C++ simulator, an embedded Software Under Test, and a firmware response. The returned status is validated and the test passes. No external process or network connection is used.

Different systems. The same discipline: control the input, observe the execution, measure the result.

Current Research

LLM inference across CPU and memory architectures.

As a Computer Science MSc student at Sapienza University of Rome, I investigate how CPU architecture and High-Bandwidth Memory shape LLM inference performance through reproducible Slurm workloads, benchmarking, and memory-bandwidth analysis.

Program
Computer Science MSc
Method
Slurm workloads · CPU inference · HBM
Evidence
Correctness · Latency · Throughput · Memory bandwidth
CPU and High-Bandwidth Memory topologyAbstract CPU tiles exchange LLM workload data with adjacent High-Bandwidth Memory stacks for correctness, latency, throughput, and memory-bandwidth analysis.
CPU compute Slurm workload flow Performance evidence

Selected Engineering Work

Tools for observable, repeatable verification.

Selected work across test automation, model-driven workflows, HPC research, machine learning, data tooling, and network systems. Repository metadata comes from synchronized GitHub data.

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Latest Notes

Evidence, experiments, and engineering notes.

Writing on test automation, systems, High Performance Computing, and the assumptions behind technical results.

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About

One method, applied across different systems.

I move between requirements, automated tests, simulators, performance experiments, and technical writing. The common thread is collecting enough evidence to explain whether a system is correct, efficient, and understood.

Sapienza University of Rome Embedded software verification
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Simulated portfolio diagnostic

Portfolio Diagnostics

A fictional, decorative sequence connecting software testing, HPC scheduling, LLM inference, and university research.

  1. Discovering requirements…Traceability matrix: ready
  2. Loading test architecture…Robot Framework libraries: ready
  3. Submitting compute workload…Scheduler: accepted
  4. Mapping model data…CPU ↔ HBM path: ready
  5. Collecting results…Portfolio verification: passed
Diagnostic ready to run.